Zero to ASIC Course

38 Folgen

1. January news update

   Vom: 1.4.2022
2. December news update

   Vom: 22.12.2021
3. Interview with Myrtle Shah: MPW3 with Coriolis, Amaranth, Flexcell & PDKMaster

   Vom: 22.12.2021
4. Interview with Staf from Chips4Makers

   Vom: 29.11.2021
5. November news update

   Vom: 25.11.2021
6. Matt Guthaus - OpenRAM

   Vom: 12.8.2021
7. Tom Spyrou - OpenROAD development, aim, roadmap and integration with OpenLANE

   Vom: 2.8.2021
8. Dirk Koch & Nguyen Dao - Fabulous embedded FPGAs

   Vom: 23.7.2021
9. Will Green: learning FPGAs with graphics and project F

   Vom: 10.6.2021
10. Dan Rodrigues - first shuttle, racing the beam & retro gaming

    Vom: 5.5.2021
11. Thomas Parry - Amateur satellite radio, Open Source vs Industry tools, beautiful analogue layout

    Vom: 23.3.2021
12. Sylvain "tnt" Munaut - testing USB peripherals on the Google/Skywater/Efabless ASIC shuttle

    Vom: 12.3.2021
13. Vladimir Milovanović - putting a spectrometer on the Google/Skywater/Efabless ASIC shuttle

    Vom: 12.3.2021
14. Arya Reais-Parsi - an FPGA for the Google/Skywater/Efabless ASIC shuttle

    Vom: 12.3.2021
15. Diego Hernando - analog circuits on the Google/Skywater/Efabless ASIC shuttle

    Vom: 12.3.2021
16. Lakshmi S - Designing a PLL for the Google/Skywater/Efabless ASIC shuttle

    Vom: 12.3.2021
17. Anton Blanchard - Microwatt: a 64 bit OpenPOWER core, VHDL and OpenLANE.

    Vom: 11.3.2021
18. Tim Edwards - what happens between ASIC submission and sending to Skywater?

    Vom: 11.3.2021